Match (de)serialization fixed + tests added

[openflowjava.git] / openflow-protocol-api / src / main / yang / openflow-types.yang

diff --git a/openflow-protocol-api/src/main/yang/openflow-types.yang b/openflow-protocol-api/src/main/yang/openflow-types.yang
index e00b8277bd9770d0eb4fcdb87151b49c5e9f01f8..d17f69a807b7290e886a52a7e7dbb40361ed7090 100644 (file)
--- a/openflow-protocol-api/src/main/yang/openflow-types.yang
+++ b/openflow-protocol-api/src/main/yang/openflow-types.yang
@@ -1364,6 +1364,47 @@ module openflow-types {
         }
     }
     
+    typedef ipv6-exthdr-flags {
+        type bits {
+            bit nonext {
+                description "<No next header> encountered.";
+                position 0;
+            }
+            bit esp {
+                description "Encrypted Sec Payload header present.";
+                position 1;
+            }
+            bit auth {
+                description "Authentication header present.";
+                position 2;
+            }
+            bit dest {
+                description "1 or 2 dest headers present.";
+                position 3;
+            }
+            bit frag {
+                description "Fragment header present.";
+                position 4;
+            }
+            bit router {
+                description "Router header present.";
+                position 5;
+            }
+            bit hop {
+                description "Hop-by-hop header present.";
+                position 6;
+            }
+            bit unrep {
+                description "Unexpected repeats encountered.";
+                position 7;
+            }
+            bit unseq {
+                description "Unexpected sequencing encountered.";
+                position 8;
+            }
+        }
+    }
+    
 // OPENFLOW v1.0 STRUCTURES
     // Structures under this line are needed to support OpenFlow version 1.0 
     // wire protocol 0x01;
@@ -1799,47 +1840,33 @@ module openflow-types {
         type bits {
             bit IN_PORT {
                 position 0;
-                /* Switch input port. */
             }
             bit DL_VLAN {
                 position 1;
-                /* Switch input port. */
             }
             bit DL_SRC {
                 position 2;
-                /* Switch input port. */
             }
             bit DL_DST {
                 position 3;
-                /* Switch input port. */
             }
             bit DL_TYPE {
                 position 4;
-                /* Switch input port. */
             }
             bit NW_PROTO {
                 position 5;
-                /* Switch input port. */
             }
             bit TP_SRC {
                 position 6;
-                /* Switch input port. */
             }
             bit TP_DST {
                 position 7;
-                /* Switch input port. */
             }
             bit DL_VLAN_PCP {
                 position 20;
-                /* Switch input port. */
             }
             bit NW_TOS {
                 position 21;
-                /* Switch input port. */
-            }
-            bit ALL {
-                position 22;
-                /* Switch input port. */
             }
         }
     }