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Updated git submodules
authorVratko Polak <vrpolak@cisco.com>
Tue, 24 Jan 2017 12:14:45 +0000 (13:14 +0100)
committerGerrit Code Review <gerrit@opendaylight.org>
Tue, 24 Jan 2017 20:47:52 +0000 (20:47 +0000)
Project: releng/builder master 2febca2cb3a8ae36aaf01dd05f675dff81f2fbbe

Override csit verify stream for Iotdm

Change-Id: Ia632b3d3e649e56cb634b4f8318365c05644fe15
Signed-off-by: Vratko Polak <vrpolak@cisco.com>
docs/submodules/releng/builder patch | blob | history

diff --git a/docs/submodules/releng/builder b/docs/submodules/releng/builder
index 15a2251fdfb9c9a187904b2b0e5bb9166f1efd89..2febca2cb3a8ae36aaf01dd05f675dff81f2fbbe 160000 (submodule)
--- a/docs/submodules/releng/builder
+++ b/docs/submodules/releng/builder
@@ -1 +1 @@
-Subproject commit 15a2251fdfb9c9a187904b2b0e5bb9166f1efd89
+Subproject commit 2febca2cb3a8ae36aaf01dd05f675dff81f2fbbe
OpenDaylight Documentation