Portmapping for SRGs with multiple circuit packs 29/99629/1
authorJonas Mårtensson <jonas.martensson@ri.se>
Tue, 1 Feb 2022 17:44:53 +0000 (18:44 +0100)
committerGilles Thouenon <gilles.thouenon@orange.com>
Mon, 7 Feb 2022 10:18:49 +0000 (11:18 +0100)
The createPpPortMapping function was resetting the logical connection
port index to 1 for every new circuit pack in an SRG so that multiple
physical ports (cp-name/port-name) were mapped to the same logical PP
port.

Move "int portIndex = 1;" to before the loop over cicuit packs.

JIRA: TRNSPRTPCE-598
Signed-off-by: Jonas Mårtensson <jonas.martensson@ri.se>
Change-Id: Ifaf4353d3eca0ee76f7e46cc81084ff5110b85f3


No differences found